The development of new semiconductor materials and improved methods of making semiconductor materials have increased the variety of devices which can be made. Many such devices require improved processing procedures which either result in more precise or accurate location of geometric features on the semiconductor body or more accurate reproduction of desirable geometric features on the semiconductor material. A particular case in point is devices utilizing intrinsic III-V compound semiconductor material. This material may be used in a variety of applications including as substrate material for various devices. Typical devices are gallium arsenide field-effect transistors (including such devices operated in the high frequency and microwave region), various types of III-V integrated circuits and devices involving arrays of detectors and diodes including light-emitting diodes.
Particularly desirable is a procedure for etching III-V intrinsic semiconductor material in which the etching is confined to a predetermined region, where the shape of the etched hole can be controlled and the extent of etching can be predetermined.
In many device fabrication procedures involving intrinsic III-V semiconductor material, it is desirable to produce holes with particular shapes, most often with straight-sided walls essentially free of etch facets (see for example L. A. D'Asaro, J. V. DiLorenzo and H. Fukui, IEEE Transactions on Electron Devices, ED-25, No. 10, October 1978, page 1218). Here, a microwave device is described and the shape of the hole through the intrinsic GaAs to the source electrode has a significant effect on device performance. Also, good control over the shape of geometric features (such as straight-sided holes or channels) on a semiconductor wafer allows closer packing of individual devices. This permits a larger yield of devices from the same wafer and fabrication procedure.
Here, it is desirable to etch a hole through intrinsic GaAs onto the source pad, generally made of metallic gold. Conventional etch procedures, involving isotropic etches, yield holes with etch facets at angles of typically 45 to 55 degrees. It is highly desirable to etch holes with straight sides (right angle pill box holes) with a minimum of lateral etching. Such a procedure permits higher packing density on the wafer which yields more devices for the same amount of processing and semiconductor material.
Photoetching is highly attractive as a fabrication procedure for semiconductors because chemical reaction is usually confined to the part of the surface irradiated. Thus, the radiation can be used to confine the etching reaction to the area desired. This is usually called anisotropic etching. It is also desirable to carry out such a procedure without the use of external power supply or electrical connection to the device being fabricated. Such electrical connections would be exceedingly tedious because of the small size of such devices and the large number of devices on each wafer. Photoetching is described in a number of references including, for example, "Photoetching and Plating of Gallium Arsenide" by R. W. Haisty, Journal of the Electrochemical Society, 108, page 790 (August 1961); "Selective Photoetching of Gallium Arsenide" by F. Kuhn-Kuhnenfeld, J. Electrochem. Soc., 119, page 1063 (August 1972); L. Hollan et al, J. Electrochem. Soc., "Solid-State Science and Technology," 126 No. 5, page 855 (1979); and "Photoetching of InP Mesas for Production of mm-Wave Transferred-Electron Oscillators" by D. Lubzens, Electronics Letters, 13, page 171 (1977).
These references describe photoelectrochemical etching of n-type GaAs by oxidative decomposition. Here, holes are created by exposure of the semiconductor to radiation and these holes permit anodic oxidation of the GaAs.
It is highly desirable to have an etching process for intrinsic compound semiconductors which is anisotropic and can be directed to predetermined areas typically by irradiation. Photoetching is highly desirable in modern fabrication procedures for semiconductors because of reduced dimensions of many recently developed semiconductor devices, high precision requirements for these devices and simpler, less costly, and more rapid manufacturing procedures possible using such an etching procedure.